The present invention relates to semiconductor devices and particularly to a substrate processing apparatus and a substrate processing method used for production of ultrafine high-speed semiconductor devices having a high-K dielectric film.
With the progress of miniaturization process, a gate length of 0.1 μm or less is becoming possible in ultra high-speed semiconductor devices of these days. Generally, the operational speed of a semiconductor device increases with miniaturization thereof, while there is a need, in such highly miniaturized semiconductor devices, of decreasing the thickness of the gate insulation film with the decrease of the gate length achieved by device miniaturization, in accordance with a scaling law.
When the gate length has become 0.1 μm or less, on the other hand, it becomes necessary to set the thickness of the gate insulation film to 1-2 nm or less in the case of using SiO2, while with such a gate insulation film of extremely small thickness, there occurs an increase of tunneling current, and the problem of increases of the gate leakage current is unavoidable.
Under such circumstances, there has been a proposal of using a high-K dielectric material such as Ta2O5, Al2O3, ZrO2, HfO2, ZrSiO4, HfSiO4, and the like, having a much larger specific dielectric constant as compared with an SiO2 film and thus providing a characteristically small film thickness when converted to the film thickness of an SiO2 film, in spite of the fact that the film itself has a large actual film thickness, for the gate insulation film. By using such a high-K dielectric material, it becomes possible to use a gate insulation film having the film thickness of 1-2 nm or less, even in the case the semiconductor device is an extremely minute ultra high-speed semiconductor device having a gate length of 0.1 μm or less. Thereby, gate leakage current caused by tunneling effect can be suppressed.
In order to form such a high-K dielectric gate insulation film on a Si substrate, there is a need of forming an SiO2 film having a thickness 1 nm or less, typically 0.8 nm or less, on the Si substrate as a base oxide film so as to suppress diffusion of metal elements constituting a high-K dielectric gate insulation film into the Si substrate, and then form a high-K dielectric gate insulation film on such extremely thin SiO2 base oxide film. Thereby, the high-K dielectric gate insulation film has to be formed such that the film does not contain defects such as interface states. Further, at the time of forming such a high-K dielectric gate insulation film on the base oxide film, it is preferable to change the composition thereof gradually from the composition primarily of SiO2 to the composition primarily of the high-K dielectric, from the side thereof contacting with the base oxide film toward the principal surface of the high-K dielectric gate insulation film.
In order to form the high-K dielectric gate insulation film such that it does not contain defects, it is not possible to use plasma process that involves the process of charged particles. For example, when such a high-K dielectric gate insulation film is formed by a plasma CVD process, there are formed defects that function as the trap of hot carriers within the film as a result of the plasma damages.
On the other hand, when an attempt is made to form such a high-K dielectric gate insulation film by a thermal CVD process, there is a need of setting the substrate temperature to a high temperature, and the film easily undergoes crystallization. Thereby, there is caused an increase of surface roughness. Further, it is discovered by the inventor of the present invention that the film formation rate changes easily by the temperature of the substrate and it is difficult to achieve uniform film thickness distribution by the uniformity of the substrate temperature. In other words, there is a tendency that the roughness of the film surface increases easily when such a high-K dielectric gate insulation film is formed with a conventional CVD process. Also, it is difficult to secure uniformity of the film thickness. Thus, in the case a thermal CVD process is applied to a gate insulation film of a MOS transistor in which it is required to control the film thickness with high-precision, there is invoked a serious influence upon the operational characteristics of the semiconductor device.